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74LVX4245
OCTAL DUAL SUPPLY BUS TRANSCEIVER
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HIGH SPEED: tPD = 8.5 ns (MAX.) at VCCA=5.0V VCCB = 3.3V LOW POWER DISSIPATION: ICCA = ICCB =5A(MAX.) at TA=25C LOW NOISE: VOLP =0.3V (TYP.) at VCCA=5.5V VCCB=3.3V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCCA(OPR) = 4.5V to 5.5V (1.2V Data Retention) VCCB(OPR) = 2.7V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4245 IMPROVED LATCH-UP IMMUNITY
SOP
TSSOP
Table 1: Order Codes
PACKAGE SOP TSSOP T&R 74LVX4245MTR 74LVX4245TTR
DESCRIPTION The 74LVX4245 is a dual supply low voltage CMOS OCTAL BUS TRANSCEIVER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Designed for use as an interface between a 5V bus and a 3.3V bus in a mixed 5V/3.3V supply systems, it achieves high speed operation while maintaining the CMOS low power dissipation.
This IC is intended for two-way asynchronous communication between data buses and the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated. The A-port interfaces with the 5V bus, the B-port with the 3.3V bus. All inputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
Figure 1: Pin Connection And IEC Logic Symbols
August 2004
Rev. 6
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74LVX4245
Figure 2: Input And Output Equivalent Circuit Table 2: Pin Description
PIN N 2 3, 4, 5, 6, 7, 8, 9, 10 21, 20, 19, 18, 17, 16, 15, 14 22 11, 12, 13 23 1 24 SYMBOL DIR A1 to A8 B1 to B8 NAME QND FUNCTION Directional Control Data Inputs/Outputs Data Inputs/Outputs
G GND NC VCCA VCCB
Output Enable Input Ground (0V) Not Connected Positive Supply Voltage Positive Supply Voltage
Table 3: Truth Table
INPUTS G L L H
X : Don't Care Z : High Impedance
FUNCTION OUTPUT DIR L H X A BUS OUTPUT INPUT Z B BUS INPUT OUTPUT Z A=B B=A Z
Table 4: Absolute Maximum Ratings
Symbol VCCA VCCB VI VI/OA VI/OB IIK IOK IOA IOB ICCA ICCB Pd Tstg TL Supply Voltage Supply Voltage DC Input Voltage DC I/O Voltage DC I/O Voltage DC Input Diode Current DC Output Diode Current DC Output Current DC Output Current DC VCC or Ground Current DC VCC or Ground Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCCA + 0.5 -0.5 to VCCA + 0.5 -0.5 to VCCB + 0.5 20 50 50 50 200 100 180 -65 to +150 300 Unit V V V V V mA mA mA mA mA mA mW C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied
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Table 5: Recommended Operating Conditions
Symbol VCCA VCCB VI VI/OA VI/OB Top dt/dv Supply Voltage (note 1) Supply Voltage (note 1) Input Voltage I/O Voltage I/O Voltage Operating Temperature Input Rise and Fall Time (note 2) Parameter Value 4.5 to 5.5 2.7 to 3.6 0 to VCCA 0 to VCCA 0 to VCCB -55 to 125 0 to 10 Unit V V V V V C ns/V
1) VIN from 30% to 70% of VCC 2) VCCA = 4.5 to 5.5V; VCCB = 2.7 to 3.6V;
Table 6: DC Specifications For VCCA
Test Condition Symbol Parameter VCCA VCCB (V) (V) 4.5 5.5 4.5 5.5 4.5 4.5 4.5 4.5 5.5 5.5 3.3 3.3 3.3 3.3 3.0 3.0 3.0 3.0 3.6 3.6 IO=-100 A IO=-24 mA IO=100 A IO=24 mA VI = VCC or GND VIA = VIHA or VILA VIB = VIHB or VILB VI/OA = VCCA or GND VIA = VCCA or GND VIB = VCCB or GND VIA = VCCA - 2.1V VIB = VCCB or GND TA = 25 C Min. 2.0 2.0 0.8 0.8 4.4 3.86 0 0.1 0.36 0.1 0.5 4.5 4.4 3.76 0.1 0.44 1 5 Typ. Max. Value -40 to 85 C -55 to 125C Unit Min. 2.0 2.0 0.8 0.8 4.4 3.76 0.1 0.44 1 5 Max. Min. 2.0 2.0 0.8 0.8 Max. V V V V A A
VIHA VILA VOHA VOLA IIA IOZA
High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current High Impedance Output Leakage Current Quiescent Supply Current
ICCtA
5.5
3.6
5
50
50
A
ICCtA
Maximum Quiescent Supply Current / Input (An, DIR, G)
5.5
3.6
1.35
1.5
1.5
mA
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74LVX4245
Table 7: DC Specifications For VCCB
Test Condition Symbol Parameter VCCA VCCB (V) (V) 5.0 5.0 5.0 5.0 4.5 4.5 4.5 VOLB Low Level Output Voltage 4.5 4.5 4.5 IIB IOZB Input Leakage Current High Impedance Output Leakage Current Quiescent Supply Current 5.5 5.5 3.6 2.7 3.6 2.7 3.0 3.0 2.7 3.0 3.0 2.7 3.6 3.6 IO=-100 A IO=-12 mA IO=-8 mA IO=100 A IO=12 mA IO=8 mA VI = VCCA or GND VIA = VIHA or VILA VI/Ob = VCCb or GND VIA = VCCA or GND VIB = VCCB or GND VIA = VCCA or GND VIB = VCCB - 0.6V TA = 25 C Min. 2.0 2.0 0.8 0.8 2.9 2.48 2.26 0.0 0.1 0.31 0.31 0.1 0.5 3.0 2.9 2.4 2.2 0.1 0.40 0.40 1 5 Typ. Max. Value -40 to 85 C -55 to 125C Unit Min. 2.0 2.0 0.8 0.8 2.9 2.4 2.2 0.1 0.40 0.40 1 5 A A V V Max. Min. 2.0 2.0 0.8 0.8 Max. V V
VIHB VILB VOHB
High Level Input Voltage Low Level Input Voltage High Level Output Voltage
ICCtB
5.5
3.6
5
50
5
A
ICCtB
Maximum Quiescent Supply Current / Input
5.5
3.6
0.35
0.5
0.35
mA
Table 8: Dynamic Switching Characteristics
Test Condition Symbol Parameter VCCA VCCB (V) (V) 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 0.8 0.8 2 -0.8 -1.2 TA = 25 C Min. Typ. 1.0 -0.6 0.8 -0.5 2 1.2 V V V V V Max. 1.5 V Value -40 to 85 C -55 to 125C Unit Min. Max. Min. Max.
VOLPA
VOLPB
VIHDA VILDA VIHDB VILDB
Dynamic Low Level Quiet Output (note 1, 2) Dynamic Low Level Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3)
1) Worst case package 2) Max number of output defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND 3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3V to threshold (VILD). 0V to threshold (VIHD) f = 1MHz
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74LVX4245
Table 9: AC Electrical Characteristics (CL = 50pF, Input tr = tf = 3ns)
Test Condition Symbol Parameter VCCB (V) 2.7 3.0 2.7
(*)
Value (3) TA = 25C Min. 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Typ. 5.1 5.3 6.5 6.7 6.0 3.3 5.4 5.5 5.2 5.8 3.9 2.9 0.5 0.5 Max. 8.5 8.5 10.0 10.0 9.5 6.5 8.5 8.5 9.0 9.0 7.0 6.5 1.0 1.0 -40 to 85C Min. 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max. 10.0 9.0 10.0 9.0 11.5 10.5 11.5 10.5 10.0 10.0 7.5 7.0 10.0 9.0 10.0 9.0 10.0 9.5 10.0 9.5 7.5 7.5 7.5 7.0 1.5 1.5 -55 to 125C Min. 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max. 11.0 10.0 11.0 10.0 12.5 11.5 11.5 11.5 11.0 11.0 8.5 8.0 11.0 10.0 11.0 10.0 11.0 10.5 11.0 10.5 8.5 8.5 8.5 8.0 1.5 1.5 ns ns ns ns ns ns ns Unit
tPLH tPHL tPZL tPZH tPLZ tPHZ tPLH tPHL tPZL tPZH tPLZ tPHZ tOSLH tOSHL
Propagation Delay Time (An to Bn) Propagation Delay Time (An to Bn) Output Enable Time (G to Bn) Output Enable Time (G to Bn) Output Disable Time (G to Bn) Output Disable Time (G to Bn) Propagation Delay Time (Bn to An) Propagation Delay Time (Bn to An) Output Enable Time (G to An) Output Enable Time (G to An) Output Disable Time (G to An) Output Disable Time (G to An) Output To Output Skew Time (note1, 2)
3.0(*) 2.7 3.0(*) 2.7 3.0(*) 2.7 3.0(*) 2.7 3.0(*) 2.7 3.0(*) 2.7 3.0(*) 2.7 3.0(*) 2.7 3.0(*) 2.7 3.0 2.7
(*)
3.0(*) 2.7 3.3(**)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn| 2) Parameter guaranteed by design 3) Typical values at VCCA = 5.0V, VCCB = 3.3V (*) Voltage range is 3.0V 0.3V
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Table 10: Capacitive Characteristics
Test Condition Symbol Parameter VCCA VCCB (V) (V) open open 3.3 3.3 5.0 5.0 TA = 25 C Min. Typ. 4.5 10 55 Max. 10 Value -40 to 85 C -55 to 125C Unit Min. Max. 10 Min. Max. 10 V V V
CINA CI/O CPD
CPD
Input Capacitance Input/Output Capacitance Dynamic Low Level Quiet Output (note 1) A to B Dynamic Low Level Quiet Output (note 1) B to A
3.3
5.0
40
V
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit)
Figure 3: Test Circuit
TEST tPLH, tPHL tPZLH, tPLZ tPZH, tPHZ
CL = 50pF or equivalent (includes jig and probe capacitance) RL = R1 = 500 or equivalent RT = ZOUT of pulse generator (typically 50)
SWITCH Open 2VCC Open
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74LVX4245
Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)
Figure 5: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle)
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74LVX4245
SO-24 MECHANICAL DATA
DIM. A A1 B C D E e H h L k ddd 10.00 0.25 0.4 0 mm. MIN. 2.35 0.1 0.33 0.23 15.20 7.4 1.27 10.65 0.75 1.27 8 0.100 0.394 0.010 0.016 0 TYP MAX. 2.65 0.30 0.51 0.32 15.60 7.6 MIN. 0.093 0.004 0.013 0.009 0.598 0.291 0.050 0.419 0.030 0.050 8 0.004 inch TYP. MAX. 0.104 0.012 0.020 0.013 0.614 0.299
0070769C
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TSSOP24 MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b c D E e H K L 6.25 0 0.50 0.19 0.09 7.7 4.3 0.65 BSC 6.5 8 0.70 0.246 0 0.020 0.05 0.9 0.30 0.20 7.9 4.5 0.0075 0.0035 0.303 0.169 0.0256 BSC 0.256 8 0.028 TYP MAX. 1.1 0.15 0.002 0.035 0.0118 0.0079 0.311 0.177 MIN. TYP. MAX. 0.043 0.006 inch
A
A2 A1 b e K c L H
D
E
PIN 1 IDENTIFICATION
1
7047476B
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74LVX4245
Tape & Reel SO-24 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 10.8 15.7 2.9 3.9 11.9 12.8 20.2 60 30.4 11.0 15.9 3.1 4.1 12.1 0.425 0.618 0.114 0.153 0.468 TYP MAX. 330 13.2 0.504 0.795 2.362 1.197 0.433 0.626 0.122 0.161 0.476 MIN. TYP. MAX. 12.992 0.519 inch
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74LVX4245
Tape & Reel TSSOP24 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.8 8.2 1.7 3.9 11.9 12.8 20.2 60 22.4 7 8.4 1.9 4.1 12.1 0.268 0.323 0.067 0.153 0.468 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.276 0.331 0.075 0.161 0.476 MIN. TYP. MAX. 12.992 0.519 inch
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Table 11: Revision History
Date 27-Aug-2004 Revision 6 Description of Changes Ordering Codes Revision - pag. 1.
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2004 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
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